I have decided to port the SBC-85 8085 CPU board over to STD Bus. I am just at the design stage so if you want to have any input, now is the time.
One of the biggest features that people have been asking for the SBC-85 is to create a CP/M version which has RAM starting at 0000h and boots to upper ROM. While that is going to be a tough feature to add in the 100mm x 100mm format of the SBC-85, I may try again after I get this board completed.
If you are interested in this STD Bus version of the SBC-85, send me an email on the contact us page and i will email you the current version of the schematic. I don’t plan on posting it to this site until it is done because it would be just be one more thing that needs to be updated.
So this board is going to be the 6.5″ x 4.5″ to match the STD requirements and it should have all the handshaking lines to meet the STD Bus specifications and to allow DMA, etc. Like the SBC-85 CPU board, it will have a RS232 port hanging on the SID and SOD lines, it will have the 8155, two EPROMs, and a 6264 RAM. I am also aiming to have a little pad-per-hole sandbox so everyone can do a little bit of tinkering with add-ons.
There will be lots of testpoints around on key signals so you can drop in a patch wire or a wirewrap pin and grab signals, unused gates, interrupts, etc., and take them to the sandbox or the I/O connector for offboard use. Speaking of the I/O header, it has been increased to a 34 pin header which gives us all the 8155 signals and the original 2X power and 2X ground lines, but now there are an additional eight unused lines that can be patched to other signals to take to the offboard protoboard. Yes, that means this version of the header will not be compatible with the existing version of the protoboard but sometimes progress is painful.
Let me know if you have any input, since i am a bare metal man, I am especially interested to hear from CP/M gurus that can give me feedback on my memory swapping plans.
Documentation for this STD Bus 8085 SBC is here
-Craig
