When compared to its predecessor , the Intel 8080, the 8085 is a powerful standalone system no longer needing an entourage of support chips. The 8085 only requires +5VDC power, an oscillator source, and somewhere to fetch code, but there is one caveat — the READY, TRAP, INTR, and HOLD pins need to be inactive. If the READY pin is low the CPU will be stuck in an eternal wait state, the HOLD will put it in a HOLD state, and the TRAP will make it continually jump to address 0x0024. Finally, if the INTR is active the processor will sit and wait for something else to feed an instruction onto the bus.
These signals are all much more useful connected to the expansion bus than if they were simply hardwired to their inactive state. For that reason, in a minimum SBC-85 CPU system a few pull resistors need to be installed to make these signals inactive. These can be 0 ohm if you never intend on using them or they can be 10k if you have plans for them or aren’t sure what the future holds. Either rate, remember to install the surface mount resistors R4, and R6 on the back (INTR, TRAP) and the two through hole resistors R6, R7 (HOLD, READY) on the front.
For good measure, at least install R2 which is a 56K pullup on RESETIN* to make sure the 8085 doesn’t continually reset. What about the rest of the reset circuit and switch? I am not sure i have ever seen an 8085 lockup if it tries to get to work before the charge pump is fully operational, but I haven’t really tried.
With these four resistors installed, the processor should be able to fetch its first instruction with just itself, the crystal, the base 2732 EPROM, and U4 74573 installed. As luck would have it, most (at least my) 2732s tend to pull their chip enable active even though they are active low. So when the first 2732 is installed you can probably get away without having any of the decoder logic installed. It is worth a try if you would like to play with an absolute minimum system.
Oh, don’t forget the power inlet and fuse F1.