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	<title>Bits Of The Golden Age | Administrator | Activity</title>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40616</link>
				<pubDate>Sun, 12 Jul 2020 23:55:13 -0800</pubDate>

									<content:encoded><![CDATA[<p>Well, I really pulled a boner by not reading the RTC specification sheet for the SPIO board and it came back to bite me.</p>
<p>Since I was going to submit boards in a couple of days, I did a quick design and layout of [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/07/SBC-85-SPIO-v1.0-e1594598260851.png" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40602</link>
				<pubDate>Sun, 12 Jul 2020 23:00:38 -0800</pubDate>

									<content:encoded><![CDATA[<p>An easy derivative of the SPIO (Serial, Parallel I/O) board is a version that has an I2C controller in place of the I/O port expansion header.   So introducing the Serial, Parallel, I2C (SPI2C) SBC-85 b [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/07/SPI2C-e1594594816179.png" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40553</link>
				<pubDate>Thu, 02 Jul 2020 00:53:55 -0800</pubDate>

									<content:encoded><![CDATA[<p>The Digital I/O Port prototyping boards have arrived an they look good so I am releasing the build files on the Documentation page.  Schematics here and build files here.</p>
<p>										 <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/07/IMG_9483-2048x1536.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40353</link>
				<pubDate>Mon, 01 Jun 2020 00:26:01 -0800</pubDate>

									<content:encoded><![CDATA[<p>UPDATE: The SBC-85 CPU v2 is now available.<br />
Those that do not have 21V programmers for the 2732A, or those running CP/M and other high memory requirements can rejoice. Version 2.0 (previously identified as [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/06/IMG_5737-scaled.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40344</link>
				<pubDate>Sun, 31 May 2020 00:55:55 -0800</pubDate>

									<content:encoded><![CDATA[<p>During assembly or development of a bubble memory system, it is safer and more convenient to use a dummy load rather than the actual 7110 bubble device.  In their BPK72 bubble demonstration kit, Intel include [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/05/Bubble-Support-3d-e1590887471102.png" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40329</link>
				<pubDate>Mon, 25 May 2020 22:34:40 -0800</pubDate>

									<content:encoded><![CDATA[<p>The 7110A 1Mbit bubble board is on Tindie for purchase. This board will also work with the 7110AZ but you must lift pin 13 up from the socket since the pinout is different for the &#8216;Z&#8217; version of the chip. The [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/05/IMG_9403-scaled.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40297</link>
				<pubDate>Sat, 16 May 2020 18:49:02 -0800</pubDate>

									<content:encoded><![CDATA[<p>Hey-laaaaa. Day-laaaaaa. My bubble&#8217;s backA quick update on the 7110A bubble board that arrived from the PCB fab shop and is now under test. This version of the board uses the much more common 7110A 20-pin version [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/05/IMG_9403-scaled.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40277</link>
				<pubDate>Sat, 16 May 2020 16:57:30 -0800</pubDate>

									<content:encoded><![CDATA[<p>Additional memory is always useful, so one of the next projects is a memory expansion board. It has been designed and a prototype laid out to be submitted with the next shop order. Here is a heads-up of its [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/05/SBC-85-Memory-Expansion-kicad-e1589648552679.png" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40211</link>
				<pubDate>Sat, 11 Apr 2020 01:04:01 -0800</pubDate>

									<content:encoded><![CDATA[<p>Populating the SBC-85 1 megabit bubble memory board was straightforward, firing it up only slightly more complicated.  I found that two pins on the KiCAD device I made were transposed which resulted in a tiny [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/04/IMG_5688-scaled.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40114</link>
				<pubDate>Mon, 06 Apr 2020 01:34:34 -0800</pubDate>

									<content:encoded><![CDATA[<p>As an undergraduate I was in a very small department where the students were very closely knit with the professors. Late afternoon on Friday was the department&#8217;s beer and popcorn day at the local bar where one [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/04/IMG_5656-scaled.jpg" /></p>
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				<title>Administrator wrote a new post</title>
				<link>http://bitsofthegoldenage.org/?p=40094</link>
				<pubDate>Sat, 04 Apr 2020 02:00:24 -0800</pubDate>

									<content:encoded><![CDATA[<p>I have been having a great deal of fun building and now testing version 1.1b of the bus monitor supreme. So far, there is only one tiny thing that annoys me that I plan on changing in the next version but [&hellip;] <img loading="lazy" src="http://bitsofthegoldenage.org/wp-content/uploads/2020/03/8CF4345A-22EB-4ECC-90D1-5310E4B5362C-scaled.jpeg" /></p>
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